An IC device is a miniaturized electronic circuit network that is built on a surface of a substrate, such as semiconductor materials, using a photolithography process. The IC device is designed using an IC design process before the IC is manufactured. The IC design process, encompassing particular logic and circuit design techniques, is a complicated process that includes multiple design stages. Each of the IC design stages needs to come together harmoniously to obtain logical correctness, maximum circuit density and optimized circuit placement with an expected timing specification. Examples of IC design stages include a feasibility study, a functional study, a Register Transfer Level (RTL) design, a layout creation, a timing analysis, etc.
An IC layout represents the IC device with geometric shapes that correspond to patterns of metal, oxide or semiconductor layers that form components in the IC device. The layout process includes the design of transistors, the placement of the transistors on a substrate, the placement of metal routings on metal layers that connect circuits, and the placement of vias on via layers that interconnect the metal layers. All the abovementioned layout process steps adhere to semiconductor process design rules provided by a wafer fabrication facility.
An exemplary IC design process includes creating a prototype design circuit on a programmable IC device and then converting the prototype circuit design into a non-programmable IC device, such as Application Specific Integrated Circuit (ASIC). The non-programmable IC device is typically not used as a prototyping vehicle because of the difficulties in estimating the timing variations and semiconductor process limitations during the design phase. Such issues are not readily fixable on a non-programmable IC as compared to a programmable IC, for which a redesign can be performed. However, a non-programmable IC is preferred as a final product due to cost considerations. Moving from a programmable IC design to a non-programmable IC design requires many design steps, such as another layout and timing analysis of the IC design, so that the differences between the programmable IC design and non-programmable IC design can be eliminated. These design steps can incur increased costs but are necessary to ensure proper performance.
It is within this context that the embodiments described herein arise.